Editor's note: Recently, John Koon , the technical editor of "Semiconductor Engineering" magazine , published an article analyzing the reasons why the automotive market chooses Chiplets and the challenges currently faced in this field. In the content of the previous issue, we saw the challenges faced by the automotive market and the key challenges of Chiplet interoperability. In this issue, China exportsemi net Network will present to you the creation of an interoperable Chiplet ecosystem .
A general approach to Chiplet development
Going forward, chiplets will be a focal point for the automotive and chip industries, which will involve everything from chiplet IP to memory interconnects and customization options and limitations.
For example, Renesas Electronics announced its plans for its next-generation SoC and MCU in November 2023. The company targets all major applications in the automotive digital space, including the latest information on its fifth-generation R-Car SoC, which targets high-performance applications and uses advanced in-package chiplet integration technology to provide automotive engineers with greater The flexibility to customize their designs.
Renesas noted that if advanced driver assistance systems (ADAS) require higher AI performance, engineers will be able to integrate the AI accelerator into a single chip. The company says this roadmap follows years of collaboration and discussions with Tier 1 and OEM customers, who have been calling for a way to accelerate development without compromising quality, including before hardware is available. Design and verification software.
"Due to the growing demand for increased on-demand computing and the need for higher levels of autonomy in future vehicles, we see challenges in the coming years for monolithic solutions to scale and meet market performance needs," Vasanth Waran, Senior Director of SoC Business and Strategy at Renesas Electronics. "Chiplet enables computing solutions to scale and exceed market demands."
Renesas Electronics has announced plans to create a family of Chiplet - based products specifically targeted at the automotive market starting in 2025 .
Standard interface allows SoC customization
It's not entirely clear how much overlap there will be between standard processors (which is where most chiplets are used today) and chiplets developed for automotive applications. But as this technology moves to new markets, the underlying technology and developments will certainly reinforce each other.
“Whether it’s an AI accelerator or an ADAS automotive application, customers need standard interface IP blocks,” said David Ridgeway, senior product manager, IP Acceleration Solutions Group, Synopsys . “Customers need fully validated IP subsystems around IP customization requirements to support in customer SoCs. The subsystem components used are very important. When I say customization, you may not realize how customizable IP has become over the past 10 to 20 years, both on the PHY side and the controller side. For example, PCI Express has evolved from PCIe Gen 3 to Gen 4 to Gen 5 and now to Gen 6. The controller can be configured to support multiple split modes with smaller link widths, including 1x16, 2x8. or 4x4. Our subsystem IP team works with customers to ensure that all custom requirements are met. For artificial intelligence applications, signal and power integrity are extremely important to meet their performance requirements. "To achieve the highest possible memory bandwidth speeds so their TPUs can handle more transactions per second, customers want the fastest possible response times whenever the application is cloud computing or artificial intelligence."
Figure 1: IP blocks including processor, digital, PHY and verification help developers implement the entire SoC. Source: Synopsys
The ultimate goal of optimizing PPA is to improve efficiency, which makes chiplets particularly attractive in automotive applications. When UCIe matures, overall performance is expected to improve exponentially. For example, UCIe can provide coastline bandwidth of 28 to 224GB/s/mm in standard packaging and 165 to 1317GB/s/mm in advanced packaging. This means a performance improvement of 20 to 100 times. Reducing latency from 20 nanoseconds to 2 nanoseconds represents a 10x improvement. Another advantage is an approximately 10-fold improvement in power efficiency, at 0.5 pJ/b (standard package) and 0.25 pJ/b (advanced package). The key is to keep the interface distance as short as possible.
In order to optimize chiplet design, the UCIe Alliance provides some suggestions:
Careful planning considers architectural cutting lines (i.e. chiplet boundaries) to optimize power consumption, latency, silicon area and IP reuse. For example, customizing a chiplet that requires a leading-edge process node while reusing other chiplets on older nodes may impact cost and time.
Thermal and mechanical packaging constraints need to be planned for the package thermal envelope, hot spots, chiplet layout, and I/O routing and breakouts.
Careful selection of process nodes is required, especially in the context of associated power delivery schemes.
Test strategies for chiplets and packaged/assembled parts need to be pre-established to ensure that silicon issues are discovered during the chiplet-level test phase, rather than after they are assembled into the package.
Summarize
Overall, the idea of standardizing chip-to-chip interfaces is rapidly gaining popularity, but the path to getting there will require time, effort, and a lot of collaboration between companies that rarely interact with each other. Building a car requires an identified car manufacturer. Building vehicles using chiplets requires an entire ecosystem, including developers, foundries, OSATs, and materials and equipment suppliers working together.
Automotive OEMs are experts at integrating systems and finding innovative ways to cut costs. But what remains to be seen is how quickly and effectively they can build and leverage an ecosystem of interoperable chiplets to shorten design cycles, improve customization, and adapt to a world where cutting-edge technologies may be obsolete by the time they are fully designed and tested, and provided to consumers.
You can also click to view the original English text: https://semiengineering.com/why-chiplets-are-so-critical-in-automotive/
