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BrainChip Partners with Andes to Expand RISC-V Ecosystem, Jointly Exploring the Future of Edge AI

At a time when artificial intelligence and semiconductor technology are deeply integrated, innovation and cooperation continue to reshape the industry landscape. As a global pioneer in the commercialization of ultra-low-carbon, all-digital, event-driven brain-inspired AI, BrainChip Holdings Ltd has joined hands with Andes Technology, a supplier of RISC-V embedded cores, to inject new vitality into the RISC-V ecosystem and jointly explore the broad market of edge AI computing.

The integration of BrainChip's NPUs with Andes RISC-V cores is significant. The result of this collaboration – the integration of BrainChip's Akida AKD1500 on Andes' QiLai Voyager development board and AndesCore AX45MP 64-bit multi-core CPU IP – is scheduled to be unveiled at Andes' RISC-V conference on April 29, 2025 in San Jose, California, and June 10, 2025 in Hsinchu, Taiwan. This integration provides a high-performance solution for edge AI computing and expands the RISC-V ecosystem.

Akida AKD1500 is based on an event-driven AI computing model that is purely digital, energy-efficient. When integrated into the Voyager development board as an M.2 card, it can achieve more than 0.7 TOPS of computing power while consuming less than 250mW. It requires only three to one-tenth the amount of computation required to achieve similar performance compared to traditional CNN processing, opening up a new path of low cost and low power consumption for RISC-V SoC integration. This technology is especially useful for battery-powered or fanless embedded edge devices, enabling AI applications that were previously difficult to achieve.

Figure: BrainChip and Andes Expand RISC-V Territory and Explore the New Future of Edge AI

Figure: BrainChip and Andes Expand RISC-V Territory and Explore the New Future of Edge AI

Andes' Qilai SoC is also a high-performance quad-core RISC-V AX45MP cluster. The AX45MP features a superscalar multicore design with shared L2 cache, a coherence manager, and a memory management unit (MMU) to support Linux-based applications. With an IOCP interface, the AX45MP enables external hardware DMAs to interact directly with the cache/memory subsystem, ensuring seamless communication with high-speed modules such as NPUs and GPUs. Built on TSMC's 7nm process and clocked at up to 2.2GHz on the Spira SoC, the Specint2006 outperforms the Cortex A55 and is popular as a Linux application processor in a wide range of applications due to its high clock frequency and multi-core Linux processing power.

The senior management of both sides has high hopes for this cooperation. Dr. Hongjie Su, CTO and President of Andes, said that the company has been working to expand the application of RISC-V solutions, and the collaboration with BrainChip and the integration of Akida IP into the Voyager platform will provide developers with more opportunities to optimize AI workloads at the edge. Steve Brightfield, Chief Marketing Officer of BrainChip, also mentioned that the combination of Akida technology and RISC-V enables efficient and intelligent edge computing, and the presentation of this achievement at RISC-V 2025 is expected to drive breakthroughs in next-generation SoC products.

Andes RISC-V 2025 brings together developers and technical experts from around the world to focus on the frontiers of RISC-V technology and promote the exchange of ideas and collaboration. BrainChip will use this platform to showcase its latest achievements in ultra-low-carbon AI solutions, highlighting the important role of AI acceleration in RISC-V design.

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