Cadence today announced the introduction of the industry's first DDR5 12.8Gbps MRDIMM Gen2 memory IP system solution on TSMC's N3 process. This innovative approach is designed to address the need for greater memory bandwidth in enterprise and data center applications, including AI in the cloud, to address unprecedented AI processing demands. Caddon's DDR5 MRDIMM IP is based on its proven and highly successful DDR5 and GDDR6 product lines with a new high-performance, scalable, and adaptable architecture. The IP solution has already demonstrated its leadership in a number of collaborations with leading AI, high-performance computing (HPC) and data center customers.
1. Breakthrough performance and architecture design
The new Cadence DDR5 IP provides a complete memory subsystem with a physical layer (PHY) and a high-performance controller. The hardware-proven design uses the latest MRDIMM (Gen2) to achieve a best-in-class data rate of 12.8Gbps, doubling the bandwidth when using current DDR5 6400Mbps DRAM components. The DDR5 IP memory subsystem is based on Cadion's silicon-proven, high-performance architecture, ultra-low latency encryption, and industry-leading reliability, availability, and serviceability (RAS) features. The DDR5 MRDIMM Gen2 IP is designed to support advanced SoCs and chiplets with flexible layout design options, while the new architecture allows power consumption and performance to be fine-tuned to individual application needs.
Figure: Cadence Electronics launches memory IP system solutions to help the development of AI in the cloud
2. Industry cooperation and synergies
"The combination of Caydon's DDR5 IP portfolio and Micron's industry-leading 1γ (1-gamma)-based DRAM addresses the growing demand for higher memory bandwidth, density and reliability for AI processing workloads," said Praveen Vaidyanathan, vice president and general manager, data center products at Micron. These memory enhancements are critical to enabling next-generation AI/ML and HPC applications in data center and enterprise environments.”
Stephen Tai, President of Montage Technology, said, "Cadence's DDR5 MRDIMM IP system solution, combined with MRDIMM modules with Montage memory buffers, provides a high-performance memory subsystem for next-generation servers with double bandwidth. Montage's MRCD02/MDB02 chip for MRDIMMs is capable of delivering impressive 12.8Gbps data rates and is ready to support server and data center products.”
3. Guidance and prospect for future technology
"Data centers and enterprise applications will gain significant performance benefits from Caddon's DDR5 12.8Gbps MRDIMM IP system solutions, as evidenced by the large customers turning to Cadence to deliver this innovative technology," said Boyd Phelps, senior vice president and general manager, Cadendon Silicon Solutions Group. This new leading-edge memory IP system not only raises the bar, but also sets the roadmap for future-proofing our customers' next-generation SoC and chiplet offerings."
In addition, Cadence's DDR5 controllers and PHYs have been validated with Cadence's DDR Verification IP (VIP) to provide fast IP and SoC verification closure. Cadion's DDR5 VIP includes a complete solution from IP to system-level validation, covering DFI VIP, DDR5 memory models, and system performance analyzers.
As cloud AI and data center applications continue to evolve, the demands on memory performance are becoming increasingly demanding. The DDR5 12.8Gbps MRDIMM Gen2 memory IP system solution launched by Cadence is expected to play a key role in the AI-driven digital era by laying a solid foundation for future high-performance computing needs through technological innovation and industry collaboration.
