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Nvidia's Huang Says Faster Chips Are the Best Way to Reduce AI Costs

In the era of rapid development of artificial intelligence, computing power cost and computing efficiency have become the focus of the industry. Nvidia CEO Jensen Huang's remarks at GTC revealed a central point: faster chips are the best way to reduce the cost of AI. This judgment is not only related to the improvement of hardware performance, but also deeply reflects the impact of chip technology evolution on the economics of the AI industry.

How can faster chips reduce the cost of AI?

Faster chips can reduce the cost of AI, which is mainly reflected in three aspects:

1. Digital slicing technology to improve concurrency

The high-performance chip supports digital slicing and can provide AI services to millions of users at the same time. Under the traditional chip architecture, the allocation of computing resources is relatively extensive and the utilization rate is low. Digital slicing technology can finely divide chip resources to achieve efficient concurrent processing. For example, in large-scale tasks such as image recognition or language translation, faster chips can process more requests in parallel, reducing task queuing time and increasing compute throughput, thereby diluting the cost of a single AI call.

2. Reduce hardware requirements and infrastructure costs

Improved computing performance means fewer chips needed to handle the same task. The inference and training of AI models usually require huge computing clusters, and faster chips can complete the same amount of computing in a shorter time, thereby reducing server procurement costs. At the same time, the reduction in the number of chips also means that the investment in infrastructure such as cooling and power supply in the computer room will decrease, further optimizing the operating expenses of the data center.

3. Optimize the system architecture and improve computing efficiency

Faster chips are often accompanied by more advanced architecture designs, data transfer speeds, and parallel computing capabilities, further improving system efficiency. For example, the use of high-bandwidth memory (HBM), network-on-chip optimization (NoC) and other technologies can reduce the transmission delay of data inside and outside the chip, so that computing resources can be maximized.

Pictured: Jensen Huang introduces new products during his keynote speech at GTC AI (Source: CNBC)

Pictured: Jensen Huang introduces new products during his keynote speech at GTC AI (Source: CNBC)

The Blackwell Ultra system: the quintessential example of increased computing power

NVIDIA's latest Blackwell Ultra system is a prime example of faster chips reducing the cost of AI. It is reported that the system can bring 50 times higher revenue to the data center than the Hopper architecture, and its core advantages lie in architecture innovation and extreme performance optimization. Although no specific technical details have been officially disclosed at this time, it can be speculated that the Blackwell Ultra has undergone major upgrades in the following areas:

More advanced multi-core architecture: Stronger parallel computing units may be used to enable efficient collaboration between different cores and improve the computational efficiency of deep learning tasks. For example, when processing Transformer models, matrix operations and gradient updates can be accelerated to optimize the training speed.

Faster data transfer: High-bandwidth interconnects and optimized memory management help reduce data transfer bottlenecks, ensuring that compute units are always working efficiently and avoid idle resources.

Stronger task parallelism: It can process multiple AI tasks at the same time, or split a single complex task into multiple subtasks to execute in parallel, greatly reducing inference time and improving the overall throughput of the data center.

Demand of Blackwell GPU is soaring

The market's acceptance of the Blackwell Ultra system is evidenced by the number of GPUs purchased. The four major cloud service providers have ordered 3.6 million Blackwell GPUs (two for each Blackwell GPU according to Nvidia's new counting method), far exceeding the 1.3 million of the previous generation of Hopper GPUs. This growth not only reflects the market's expectations for the new architecture, but also further demonstrates the value of faster chips in reducing AI computing costs and improving data center economics.

Conclusion

Faster chips are not only the key to improving AI efficiency, but also the fundamental way to reduce the cost of computing power. The advent of the Blackwell Ultra system is revolutionizing the economics of the data center. With the continuous breakthrough of chip technology, AI computing will move towards a new era of higher efficiency and lower cost in the future.

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