samsung-electronics-enters-into-panel-level-packaging-field-ahead-of-tsmc
With the rapid development of semiconductor technology, packaging technology has become a key link to promote semiconductor performance improvement and reduce costs. In recent years, Panel Level Packaging (PLP) technology has attracted much attention due to its high efficiency and low cost.
1. Samsung Electronics' strategic layout in the field of PLP
Samsung Electronics has been occupying an important position in the global semiconductor market with its excellent technological strength and innovation capabilities. In terms of packaging technology, Samsung Electronics has shown its forward-looking strategic vision. As early as 2019, Samsung Electronics acquired the PLP business from Samsung Electro-Mechanics for 785 billion won (about 581 million US dollars), a move that not only demonstrates the importance that Samsung Electronics attaches to PLP technology, but also lays the foundation for its leading position in the PLP field.
2. Samsung Electronics' R&D and application of PLP technology
After acquiring the PLP business, Samsung Electronics has carried out a lot of R&D work on PLP technology. Through close cooperation with customers, Samsung Electronics has successfully applied PLP technology to applications that require low-power memory integration, such as mobile or wearable devices. Among them, the FO-PLP (Fan-Out Panel Level Packaging) technology has become Samsung Electronics' star product in the PLP field. FO-PLP technology allows multiple chips or components to be packaged on a large area substrate, increasing productivity and reducing costs.
In addition, Samsung Electronics plans to further expand its 2.5D packaging technology, I-Cube, to include PLP. This move will make Samsung Electronics more comprehensive and leading in packaging technology. Through continuous innovation and R&D, Samsung Electronics' technological strength in the PLP field has been further consolidated and enhanced.
Figure: Samsung's panel-level technical structure (Source: Samsung)
3. TSMC's challenges in the PLP field
Compared to Samsung Electronics, TSMC's research in the field of PLP is still in its early stages. Although TSMC has begun research on PLP-related technologies, including Fan-Out (FO)-PLP, large-scale production is expected to take several years. In addition, TSMC has a long-term bottleneck in CoWoS (Chip-on-Wafer-on-Substrate) packaging technology, which further increases the difficulty of its development in the PLP field.
At the same time, competition from fabless companies such as AMD and Broadcom for TSMC's CoWoS production also makes its plans to ramp up capacity challenging. These factors make TSMC's development in the PLP field face many difficulties.
4. market trends and impacts
With the rapid development of artificial intelligence, big data and other technologies, the demand for high-performance, low-power semiconductor packaging technology is increasing. As an emerging packaging technology, PLP technology is gradually becoming a hot spot in the market. Samsung Electronics' leading position in the PLP field will help it further strengthen its position in the global semiconductor market and provide more advanced and efficient semiconductor products to its customers.
In conclusion, Samsung Electronics is already ahead of its competitor TSMC in the field of panel-level packaging (PLP). Through forward-looking strategic layout, continuous technological innovation, and extensive application practices, Samsung Electronics will continue to promote the progress and innovation of semiconductor packaging technology and make greater contributions to the development of the global semiconductor industry.
