According to reports, under the focus of the semiconductor industry, TSMC made a stunning appearance at the North American Technology Symposium, shocking the industry with a series of cutting-edge technological achievements, especially its next-generation logic process technology A14, which became the focus of the audience and drew a new blueprint for the development of the semiconductor field.
The A14 process technology is another milestone in TSMC's semiconductor journey. It's built out of the industry-leading N2 process, but it's a quantum leap. The A14, which is expected to go into production in 2028, is currently progressing well and its yield performance has exceeded expectations. Compared to the N2 process, which will be mass-produced later this year, the A14 delivers impressive performance gains: up to 15% faster computing speeds at the same power consumption; At the same speed, power consumption can be reduced by up to 30 percent, while logic density is increased by more than 20 percent. In terms of transistor architecture, TSMC has upgraded the TSMC NanoFlex™ standard cell architecture to NanoFlex™ Pro with its deep experience in collaborative optimization of nanosheet transistor design technology, further unleashing the performance potential of chips, improving energy efficiency and giving greater design flexibility, injecting strong impetus into the rapid development of AI computing, and upgrading the onboard AI capabilities of smartphones to become more intelligent.
In addition to the A14, TSMC also showcased innovative technologies in multiple fields to build a comprehensive technology ecosystem.
In the field of high-performance computing (HPC), in order to meet the urgent needs of artificial intelligence for massive logic operations and high-bandwidth memory (HBM), TSMC continues to deepen its Chip on Wafer on Substrate (CoWoS®) technology. In 2027, the 9.5-reticle size CoWoS will be in mass production, with 12 or more HBM stacks integrated into a single package, working in tandem with leading-edge logic technologies. The revolutionary Wafer-Level System (TSMC-SoW™) technology launched in 2024 will be followed by the CoWoS-based SoW-X, which delivers 40 times the computing power of current CoWoS solutions, also scheduled for mass production in 2027. In addition, TSMC also provides silicon photonic integration technology (COUPE™), N12 and N3 logic foundation chips for HBM4, and a new integrated voltage regulator (IVR) to improve computing performance and efficiency from multiple dimensions.
Figure: TSMC North America Technology Seminar: Frontier Technology Leads the Future of Semiconductors
In the smartphone space, with the explosive growth of AI applications in edge devices, the need for high-speed, low-latency wireless connectivity to transmit massive amounts of data is becoming more and more urgent. TSMC's N4C RF RF technology is the latest generation of RF technology that reduces power consumption and area by 30% compared to N6RF+, making it possible to integrate more digital content into RF system-on-chip designs, and is ideally aligned with emerging standards such as WiFi8 and AI-rich true wireless stereo, and is expected to enter trial production in the first quarter of 2026.
In the automotive industry, advanced driver assistance systems (ADAS) and autonomous vehicles (AVs) place demanding computing power without sacrificing automotive-grade quality and reliability. TSMC's N3A process is in the final stage of AEC-Q100 Grade-1 qualification, continuously optimizing the defect rate to meet the automotive industry's one-per-million defect rate (DPPM) standard, and has now entered the mass production stage of automotive applications, helping the technological innovation of future software-defined vehicles.
In the Internet of Things, everyday electronics and appliances are incorporating AI capabilities to take on more computing tasks while battery power consumption is limited. TSMC's previously launched ultra-low-power N6e process is already in production, and the N4e process is targeting the future of edge AI and continues to push the limits of energy efficiency.
The TSMC North America Technology Symposium in Santa Clara, California, attracted more than 2,500 registered attendees as the annual flagship customer event. At the conference, TSMC not only shared the latest technology developments, but also set up an "innovation zone" for start-ups, showcasing unique products and providing opportunities for roadshows to potential investors. The symposium also kicked off a series of global technology seminars in the coming months, and TSMC is using technology as a bridge to connect all parties in the industry and jointly drive towards the innovative future of semiconductors.
