Hercules Microelectr

Herclues FPGA HME-P (Pegasus) Series

This series of products uses a new LUT 6 architecture and 32-way full clock network, and the operating speed can reach 700MHz. In addition, in response to the application needs of the high-speed and large-capacity market, P1 also integrates high-speed Serdes interfaces, up to 6.5 G, 1333Mbps hard-core DDR2/3 controller and hard-core PCIe interface, and 36*18 DSP processor. This product has a 40nm CMOS process and uses a new LUT6 architecture, which is equivalent to 60K 4-input LUT logic units, up to 5G bps Serdes high-speed I/O, and has 1333M bps hard-core DDR2/3 control and PHY, hard-core PCIe Gen1/ Gen2 is aimed at the FPGA market that requires high speed, high performance and large capacity.

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Merchant qualification:

Hercules Microelectronics is one of the first domestic companies to enter into independent research and development, large-scale production, and mass sales of general-purpose FPGA chips and new generation heterogeneous programmable computing chips. The company has independent and complete independent intellectual property rights, covering full-stack technology fields such as FPGA core design, SoC architecture design, chip development, EDA software development, IP development and integration.

Product Introduction&Application Fields

product details

1.Fabric

  • 18,432 to 122,880 6-input lookup tables, 36,864 to 196,608 DFF memory locations

  • Logic performance up to 300MHz

2. Embedded RAM memory

  • Up to 1,966kb local LRAM, 64bit each

  • Up to 17,694kb programmable dual-port DPRAM, configurable to ROM, FIFO and other modes, with ECC function

3.Embedded DSP module

  • Each DSP module supports 36x18 operations or 2 independent 18x18 operations

  • Pre-add/accumulate sum supports 56-bit addition and subtraction functions

  • Multiple DSP modules can be cascaded

4.Clock network

  • 32 de-skew global clocks

  • Up to 8 PLLs supporting frequency multiplication, frequency division, and de-skew

  • 8 external clock inputs, 1 external crystal clock input

5.I/O characteristics

  • Support 3v/2.5v/1.8v/1.5v LVTTL, 3.3v/2.5v/1.8v/ 1.5v/1.2v LVCMOS

  • Support 5v LVDS/BLVDS, TMDS, Mini-LVDS

  • Support LVPECL, CML

  • Support PCI/PCI-X

  • Support high-speed LVDS interface, up to 1.3Gbps, hardware supports serial-to-parallel conversion

6.Hardcore IP

  • High-speed AXI bus

  • PCIe Gen1 (x1, x2, x4), Gen2 (x1, x2, x4)

  • High-speed Serdes transceiver supporting multiple protocols

  • 1333Mbps DDR2/3 controller and PHY interface

7.Configuration mode

  • Support JTAG, SPIx1x2x4 AS, PS and x8x16 PP

  • Supports automatic detection of configuration RAM errors and alarms to prevent SEU interference

  • Support configuration data compression

8.Support configuration data compression

  • Use 256-bit AES profile stream encryption and decryption

  • Efuse-based protection function

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