Herclues FPGA HME-R (River) Series

1.FPGA

• 768 to 3072 4-input lookup tables, 512 to 10240 registers

• Logic performance up to 150MHz

• Embedded RAM memory

• Four 18Kb programmable dual-port memories

• Four 18Kb programmable dual-port memories

2.Clock network

• 8 de-skew global clocks

• Up to 4 PLLs, supports frequency multiplication, frequency division and de-skew, and supports multiple clock compensation modes

• 8 external clock inputs

3.Multi-voltage, multi-standard, multi-zone I/O

• 3V~1.5V single-ended LVCMOS, LVTTL I/O standard

• LVDS25/ sub-LVDS I/O standard

• Differential data transfer rates up to 800 Mbps

• Configurable drive strength

• Configurable slew rate

• Configurable input and output delays

• Schmitt trigger input, 200mv hysteresis

4.Low power consumption characteristics

• Ultra-low power devices

• 40nm low power consumption process

• Standby power consumption as low as 32uW

• Configurable low-swing differential I/O

• Static power consumption can be reduced by turning off on-chip resources

• Effectively reduce dynamic power consumption through dynamic clock switching and gated clock systems

5.Configuration

• Supports JTAG, AS and PS configuration modes

6.Safety

• Use 128-bit AES profile stream encryption and decryption

• Up to 384-bit Efuse for storing AES keys and user IDs