Corelink Piepline ADC-CL3669

The CL3669 is a dual-channel, high linearity, 16-bit, 250MSPS analog-to-digital converter (ADC). Designed for low power and high spurious-free dynamic range (SFDR), the device features low noise performance and excellent SFDR over a wide input frequency range, consumes less than 600mW per channel, and is packaged and pin-compatible with TI's ADS42LB69. The device integrates auxiliary modules such as voltage reference, reference driver, SPI interface, etc., simplifying the peripheral circuit; the chip output interface is DDR LVDS, and also outputs a data synchronization clock.

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Merchant qualification:

Founded in 2018, CoreLink has R&D centers in Beijing, Qingdao, Shanghai, and Shenzhen. It is a national high-tech enterprise focusing on digital-analog mixed signal chain chip design.

Product Introduction&Application Fields

product details

  • Dual channel, 16-bit resolution, 250M sampling rate

  • Typical dynamic performance @fin = 70MHz; SNR = 73.5dBFS; ENOB = 11.9bit; SFDR = 85dBFS

  • Supply voltage: 0V/3.3V

  • Low power consumption: 600mW/channel

  • Typical static performance: DNL = ±0.5 LSB; INL = ±4.0 LSB

  • Output interface: DDR LVDS

  • Package: 64-pin QFN, 9mmx9mm

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